FET-MX9352-C System on Module

RAM

1GB LPDDR4

ROM

8GB eMMC

Operating temperature width

-40℃ ~ 85℃

Packaging

board to board connector(2x 100-pin connector with pitch of 0.4mm, combined height 1.5mm)

Dimensions

33x 48mm

LVDS

1

single 4-lane supports 720p60, and can support up to 1366x768p60 or 1280x800p60

RGB parallel

1

RGB888, up to 1366x768p60 or 1280x800p60

MIPI DSI

1

1x 4-lane MIPI-DSI, pixel from LCDIF;

compatible with both MIPI DSI v1.2 and MIPI D-PHY v1.2;

up to 200MHz pixel clock, pixel filling rate 140 Mpixel/s, 24-bit RGB;

supports resolution 1080p60 or 1920x1200p60, each lane with data rating up to 1.5Gbps

Ethernet

≤2

supports 2x RGMII, one supported with TSN;

the one with TSN Ethernet QoS supports 802.1Qbv and 802.1Qbu and time based scheduling;

10/ 100 / 1000Mbps, complies with IEEE 802.3

complies with USB3.0;

SDR up to 200MHz, and DDR speed up to 50MHz

SAI1 supports 2 lanes, SAI2 supports 4 lanes, and SAI3 supports 1 lane;

supports full-duplex serial, such as I2S, AC97, TDM and codec/ DSP

supports raw capture mode

supports L-PCM and IEC61937;

MIPI CSI

1

compatible with MIPI CSI-2 v1.3 and MIPI D-PHY v1.2;

supports up to 2 RX data lanes (and 1 RX clock lane);

pixel clock up to 200MHz, up to 150Mpixel/s pixel filling rate under rated voltage and super speed voltage

SPI

≤8

master/ slave mode can be set

I2C

≤8

up to 100Kbit/s under standard mode, 400Kbit/s under fast speed mode, 1000Kbit/s under enhanced fast speed mode, 3400Kbit/s under high speed mode, and 5000Kbit/s under super fast speed mode;

slave mode is available for high speed mode and super fast speed mode

I3C

≤2

supports 400Kbit/s fast speed mode and 1000Kbit/s enhanced fast speed mode, it"s backwards compatible with I2C;

clock up to 12.5M, supports HDR-DDR mode

ADC

≤4

1x 12-bit 4-lane 1MS/s ADC

JTAG

1

to debug Cortex-M33